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11-53 11 transceivers product description ordering information typical applications features functional block diagram rf micro devices, inc. 7628 thorndike road greensboro, nc 27409, usa tel (336) 664 1233 fax (336) 664 0454 http://www.rfmd.com optimum technology matching? applied si bjt gaas mesfet gaas hbt si bi-cmos sige hbt si cmos 17 18 26 12 11 9 linear rssi 24 7 5 gain control 47 3 31 30 34 prescaler 128/129 or 64/65 phase detector & charge pump 41 40 39 38 35 36 lock detector 42 43 ref select 37 14 13 data out rssi div ctrl mod ctrl osc sel 23 mute if2 in if1 out 21 if2 bp+ 20 vref if 22 if2 bp- 16 if1 bp- 15 if1 bp+ if1 in- if1 in+ mix out- mix out+ mix in lna out rx in tx out lvl adj resntr+ mod in vref p lock det loop flt osc b1 osc b2 osc e 45 prescl out 28 if2 out 27 demod in resntr- 25 fm out RF2905 433/868/915mhz fm/fsk/ask/ook transceiver ? wireless meter reading keyless entry systems 433/868/915mhz ism band systems wireless data transceiver wireless security systems battery powered portable devices the RF2905 is a monolithic integrated circuit intended for use as a low cost fm transceiver. the device is provided in 7mmx7mm, 48-lead plastic lqfp packaging and is designed to provide a fully functional fm transceiver. the chip is intended for linear (am, fm) or digital (ask, fsk, ook) applications in the north american 915mhz ism band and european 433mhz and 868mhz ism bands. the integrated vco, dual modulus/dual divide (128/129 or 64/65) prescaler, and reference oscillator require only the addition of an external crystal to provide a complete phase-locked oscillator. fully monolithic integrated transceiver 2.7v to 5.0v supply voltage narrow band and wide band fm/fsk 300mhz to 1000mhz frequency range 10db cascaded noise figure 10mw output power at 433mhz RF2905 433/868/915mhz fm/fsk/ask/ook transceiver RF2905 pcba-l fully assembled evaluation board (433mhz) RF2905 pcba-m fully assembled evaluation board (868mhz) RF2905 pcba-h fully assembled evaluation board (915mhz) 11 rev b11 010516 dimensions in mm. 7.00 +0.10sq. 9.00 +0.20sq. 0.22 +0.05 7 max 0 min 0.60 0.15 0.10 + 0.127 1.40 +0.05 0.50 0.35 0.25 package style: lqfp-48, 7x7
11-54 RF2905 rev b11 010516 11 transceivers absolute maximum ratings parameter ratings unit supply voltage -0.5 to +5.5 v dc control voltages -0.5 to +5.0 v dc input rf level +10 dbm output load vswr 50:1 operating ambient temperature -40 to +85 c storage temperature -40 to +150 c parameter specification unit condition min. typ. max. overall t=25 c, v cc =3.6v, freq=915mhz rf frequency range 300 to 1000 mhz vco and pll section vco frequency range 300 to 1000 mhz prescaler divide ratio 64/65 or 128/129 prescaler output impedance 50 ? pll phase noise -75 dbc/hz freq=915mhz, 10khz offset, 5khz loop bandwidth -100 dbc/hz freq=915mhz, 100khz offset, 5khz loop bandwidth reference frequency tbd 17 mhz crystal r s 50 100 ? charge pump current -40 +40 a transmit section max modulation frequency 2 mhz min modulation frequency set by loop filter bandwidth maximum power level +7 +10 dbm freq=433mhz 0 +3 8 dbm freq=915mhz power control range 12 db power control sensitivity 10 db/v max fm deviation 200 khz instantaneous frequency deviation is inversely proportional with the modulation voltage antenna port impedance 50 ? tx enabl=?1?. rx enabl=?0? antenna port vswr 1.5:1 tx mode modulation input impedance 4 k ? harmonics -23 dbc spurious dbc compliant to part 15.249 and i-ets 300 220 overall receive section frequency range 300 to 1000 mhz cascaded voltage gain 35 db freq=433mhz 23 db freq=915mhz cascaded noise figure 10 db cascaded input ip 3 -31 dbm freq=433mhz -26 dbm freq=915mhz rx sensitivity -95 -101 dbm if bw=180khz, freq=915mhz, s/n=8db lo leakage -70 dbm rssi dc output range 0.5 to 2.5 v r load =51k ? rssi sensitivity 25 mv/db rssi dynamic range 70 80 db caution! esd sensitive device. rf micro devices believes the furnished information is correct and accurate at the time of this printing. however, rf micro devices reserves the right to make changes to its products without notice. rf micro devices does not assume responsibility for the use of the described product(s).
11-55 RF2905 rev b11 010516 11 transceivers parameter specification unit condition min. typ. max. lna voltage gain 23 db 433mhz 16 db 915mhz noise figure 4.8 db 433mhz 5.5 db 915mhz input ip 3 -27 dbm 433mhz -20 dbm 915mhz input p 1db -37 dbm 433mhz -30 dbm 915mhz antenna port impedance 50 ? rx enabl=?1?. tx enabl=?0? antenna port vswr 1.5:1 rx mode output impedance open collector ? 433mhz open collector ? 915mhz mixer single-ended configuration conversion voltage gain 8 db 433mhz 7 db 915mhz noise figure (ssb) 10 db 433mhz 17 db 915mhz input ip 3 -21 dbm 433mhz -17 dbm 915mhz input p 1db -31 dbm 433mhz -28 dbm 915mhz maximum output voltage v pp balanced first if section if frequency range 0.1 10.7 25 mhz voltage gain 34 db if=10.7mhz, z l =330 ? noise figure 13 db if1 input impedance 330 ? if1 output impedance 330 ? second if section if frequency range 0.1 10.7 25 mhz voltage gain 60 db if=10.7mhz if2 input impedance 330 ? if2 output impedance 1 k ? at if2 out- pin demod input impedance 10 k ? fm output impedance 500 ? data output impedance >1 ? fm output bandwidth 500 khz 3db bandwidth, dependent upon if band- width and discriminator. data output bandwidth 500 khz 3db bandwidth, z load =1m ? || 3pf; depen- dent upon if bandwidth and discriminator. data output level 0.3 v cc -0.3 v z load =1m ? || 3pf; output voltage is pro- portional with the instantaneous frequency deviation. fm output dc level 2.6 v z load >10k ? fm output ac level 200 mv pp z load >10k ?
11-56 RF2905 rev b11 010516 11 transceivers parameter specification unit condition min. typ. max. power down control logical controls ?on? 2.0 v voltage supplied to the input logical controls ?off? 1.0 v voltage supplied to the input control input impedance 25k ? turn on time 4 ms reference crystal=7.075mhz turn off time 4 ms dependent upon reference crystal. higher rx to tx and tx to rx time 4 ms frequencies reduce turn on/off times power supply voltage 3.6 v specifications 2.7 to 5.0 v operating limits current consumption 22 25 34.5 ma tx mode, lvl adj=3.6v 8 10 13.5 ma tx mode, lvl adj=0v 7 9 12 ma rx mode 1 a power down mode which sets: pll enabl, tx enabl, rx enabl, lvl adj, osc sel, and mute=0v 5.3 8 10 ma pll only mode
11-57 RF2905 rev b11 010516 11 transceivers pin function description interface schematic 1 rx enabl enable pin for the receiver circuits. rx enabl>2.0v powers up all receiver functions. rx enabl<1.0v turns off all receiver functions except the pll functions and the rf mixer. 2 tx enabl enables the transmitter circuits. tx enabl>2.0v powers up all trans- mitter functions. tx enabl<1.0v turns off all transmitter functions except the pll functions. 3txout rf output pin for the transmitter electronics. tx out output impedance is a low impedance when the transmitter is enabled. tx out is a high impedance when the transmitter is disabled. 4gnd2 ground connection for the 40db if limiting amplifier and tx pa func- tions. keep traces physically short and connect immediately to ground plane for best performance. 5rxin rf input pin for the receiver electronics. rx in input impedance is a low impedance when the transmitter is enabled. rx in is a high imped- ance when the receiver is disabled. 6gnd1 ground connection for rf receiver functions. keep traces physically short and connect immediately to ground plane for best performance. 7lnaout output pin for the receiver rf low noise amplifier. this pin is an open collector output and requires an external pull up coil to provide bias and tune the lna output. 8gnd3 same as pin 4. 9 mix in rf input to the rf mixer. an lc matching network between lna out and mix in can be used to connect the lna output to the rf mixer input in applications where an image filter is not needed or desired. 10 gnd5 gnd5 is the ground connection shared by the input stage of the trans- mit power amplifier and the receiver rf mixer. 11 mix out+ complementary (with respect to pin 12) if output from the rf mixer. interfaces directly to 10.7mhz ceramic if filters as shown in the appli- cation schematic. a pull-up inductor and series matching capacitor should be used to present a 330 ? termination impedance to the ceramic filter. alternately, an if tank can be used to tailor the if fre- quency and bandwidth to meet the needs of a given application. 12 mix out- if output from the rf mixer. for a balanced mixer output, pull-up induc- tors from pin 11 and 12 to v cc and a capacitor between the pins should be used. the sum of the total pull-up inductance should be used to res- onate the capacitor between pins 11 and 12. dc blocking capacitors of 10nf can then be used to connect the balanced output to if1 in+ (pin 13) and if1 in- (pin 14). see pin 11. 50 k ? rx enabl 40 k ? 20 k ? tx enabl tx out 20 v cc rx in 500 lna out v cc gnd5 mix in mix out- mix out+ 15 pf 15 pf gnd5 gnd5
11-58 RF2905 rev b11 010516 11 transceivers pin function description interface schematic 13 if1 in+ balanced if input to the 40db limiting amplifier strip. a 10nf dc block- ing capacitor is required on this input. 14 if1 in- functionally the same as pin 13 except inverting node amplifier input. in single-ended applications, this input should be bypassed directly to ground through a 10nf capacitor. see pin 13. 15 if1 bp+ dc feedback node for the 40db limiting amplifier strip. a 10nf bypass capacitor from this pin to ground is required. see pin 13. 16 if1 bp- same as pin 15. see pin 13. 17 if1 out if output from the 40db limiting amplifier. the if1 out output presents a nominal 330 ? output resistance and interfaces directly to 10.7mhz ceramic filters. 18 if2 in balanced if input to the 60db limiting amplifier strip. a 10nf dc block- ing capacitor is required on this input. the if2 in input presents a nom- inal 330 ? input resistance and interfaces directly to 10.7mhz ceramic filters. 19 gnd6 ground connection for 60db if limiting amplifier. keep traces physically short and connect immediately to ground plane for best performance. 20 vref if dc voltage reference for the if limiting amplifiers. a 10nf capacitor from this pin to ground is required. 21 if2 bp+ dc feedback node for the 60db limiting amplifier strip. a 10nf bypass capacitor from this pin to ground is required. see pin 18. 22 if2 bp- same as pin 21. see pin 18. 23 mute this pin is used to mute the data output (data out). mute>2.0v turns the data out signal on. mute<1.0v turns the data out sig- nal off. the mute signal should be logic low in the sleep mode. 24 rssi a dc voltage proportional to the received signal strength is output from this pin. the output voltage range is 0.5v to 2.5v, into 51k ? load, and increases with increasing signal strength. 25 fm out linear output from the fm demodulator. this pin is used in analog applications when signal fidelity is important. this output is inverted for low side injection of the lo and normal for high side injection. 26 data out demodulated data output from the demodulator. output levels on this are ttl/cmos compatible. the magnitude of the load impedance is intended to be 1m ? or greater. when using a RF2905 transmitter and receiver back to back a data inversion will occur, when the lo is low side injected. a high side injection will add an inversion of the rx data. if1 in- if1 in+ 330 330 60 k ? 60 k ? if1 bp+ if1 bp- if1 out if2 in 330 330 60 k ? 60 k ? if2 bp+ if2 bp- 25 k ? 75 k ? mute v cc rssi fm out data out
11-59 RF2905 rev b11 010516 11 transceivers pin function description interface schematic 27 demod in this pin is the input to the fm demodulator. this pin is not ac cou- pled. therefore, a dc blocking capacitor is required on this pin to avoid shorting the demodulator input with the lc tank. a ceramic discrimina- tor or dc blocked lc tank resonant at the if should be connected to this pin. 28 if2 out balanced if output from the 60db limiting amplifier strip. this pin is intended to be connected to pin 27 through a 4pf (suggested) capaci- tor and an fm discriminator circuit. 29 vcc6 this pin is used is supply dc bias to the second if amplifier, demodu- lator and data slicer. an if bypass capacitor should be connected directly to this pin and returned to ground. a 10nf capacitor is recom- mended for 10.7mhz if applications. 30 resntr+ this port is used to supply dc voltage to the vco as well as to tune the center frequency of the vco. equal value inductors should be con- nected to this pin and pin 31 although a small imbalance can be used to tune in the proper frequency range. 31 resntr- see resntr+ description. see pin 30. 32 vcc2 this pin is used is supply dc bias to the vco, prescaler, and pll. an rf bypass capacitor should be connected directly to this pin and returned to ground. a 22pf capacitor is recommended for 915mhz applications. a 68pf capacitor is recommended for 433mhz applica- tions. 33 gnd4 gnd4 is the ground shared on chip by the vco, prescaler, and pll electronics. 34 mod in fm analog or digital modulation can be imparted to the vco through this pin. the vco varies in accordance to the voltage level presented to this pin. to set the deviation to a desired level, a voltage divider refer- enced to vcc is the recommended. this deviation is also dependent upon the overall capacitance of the external resonant circuit. see pin 30. 35 div ctrl this pin is used to select the desired prescaler divisor. a logic high (divctrl>2.0v) selects the 64/65 divisor. a logic low (divctrl<1.0v) selects the 128/129 divisor. 36 mod ctrl this pin is used to select the prescaler modulus. a logic high (mod ctrl>2.0v) selects 64 or 128 for the prescaler divisor. a logic low (mod ctrl<1.0v) selects 65 or 129 for the prescaler divisor. duetodesigntimingconstraints,theprescalerinthedivideby65or 129 modes has a limited frequency range for accurate operation. these two modes are not recommended for use from 400mhz to 460mhz. 37 osc sel a logic high (osc sel>2.0v) applied to this pin powers on reference oscillator 2 and powers down reference oscillator 1. a logic low (osc sel<1.0v) applied to this pin powers on reference oscillator 1 and powers down reference oscillator 2. 38 osc b2 this pin is connected directly to the reference oscillator 2 transistor base. the intended reference oscillator configuration is a modified col- pitts. demod in 10 k ? v cc if2 out resntr- esntr+ 4k ? mod in div ctl mod ctl osc e osc b1 osc b2
11-60 RF2905 rev b11 010516 11 transceivers pin function description interface schematic 39 osc e this pin is connected directly to the emitter of the reference oscillator transistors. see pin 38. 40 osc b1 this pin is connected directly to the reference oscillator 1 transistor base. the intended reference oscillator configuration is a modified col- pitts. see pin 38. 41 loop flt output of the charge pump, and input to the vco control. an rc net- work from this pin to ground is used to establish the pll bandwidth. 42 vref p bypass pin for the prescaler reference voltage. a 33nf capacitor to ground is needed to suppress reference spurs in the device. this value may be different for different pcb arrangements. 43 lock det this pin provides an analog output indicating the lock status of the pll. the amplitude of this signal is typically 200mv pp around a dc level of v cc -0.1 v. 44 vcc1 this pin is used to supply dc bias to the lna, mixer, first if amp, and bandgap reference. a rf bypass capacitor should be connected directly to this pin and returned to ground. a 22pf capacitor is recom- mended for 915mhz applications. a 68pf capacitor is recommended for 433mhz applications. 45 prescl out dual-modulus/dual-divide prescaler output. the output can be inter- faced to an external pll ic for additional flexibility in frequency pro- gramming. 46 vcc3 this pin is used to supply dc bias and collector current to the transmit- ter pa. a rf bypass capacitor should be connected directly to this pin and returned to ground. a 22pf capacitor is recommended for 915mhz applications. a 68pf capacitor is recommended for 433mhz applica- tions. 47 lvl adj this pin is used to vary the transmitter output power. an output level adjustment range greater than 12db is provided through analog volt- age control of this pin. dc current of the transmitter power amp ia also reduced with output power. this pin must be low when the transmitter is disabled. 48 pll enabl this pin is used to power up or down the vco and pll. a logic high (pllenabl>2.0v) powers up the vco and pll electronics. a logic low (pllenabl<1.0v) powers down the pll and vco. loop flt v cc lock det 20 k ? v cc prescl out 400 4k ? lvl adj 40 k ? 50 k ? pll enabl
11-61 RF2905 rev b11 010516 11 transceivers RF2905 theory of operation and application information the RF2905 is a part of a family of low-power rf transceiver ic?s that was developed for wireless data communication devices operating in the european 433/ 868mhz ism bands or 915mhz us ism band.this ic has been implemented in a 15ghz silicon bipolar pro- cess technology that allows low-power transceiver operation in a variety of commercial wireless products. in its basic form, the RF2905 can implement a two-way half duplex fsk transceiver with the addition of some crystals, filters, and passive components. there are two reference crystals that allow for the transmit carrier and the receiver lo to be independently generated with a common pll and vco. the receiver if section is optimized to interface with low cost 10.7mhz ceramic filters but has a -3 db bandwidth of 25mhz and can still be used (with lower gain) at higher fre- quency with the other type of filters. the pa output and lna input are available on separate pins and are designed to be connected together through a dc blocking capacitor. in the transmit mode, the pa will have a 50 ? impedance and the lna will be a high impedance. in receive mode, the lna will have a 50 ? interface and the pa will have a high impedance. this eliminates the need for a tx/rx switch and allows a singlerffiltertobeusedintransmitandreceive modes. separate access to the pa and lna allow the RF2905 to interface with external components such as higher power pa?s, lower nf lna?s, upconverters, and downconverters for a variety of implementations. fm/fsk systems the mod in pin drives an internal varactor for modu- latingthevco.thispincanbedrivenwithavoltage level needed to generate the desired deviation. this voltage can be carried on a dc bias to select the desired slope (deviation/volt) for fm systems. or, a resistor divider network referenced to vcc or ground can divide down logic level signals to the appropriate level for a desired deviation in fsk systems. on the receiver demod, two outputs are available, an analog fm output and a digital fsk output. the fm output is a buffered signal coming off of the quadrature demodulator. the digital output is generated by a data slicer that is dc coupled differentially to the demodula- tor. an on-chip 1.6mhz rc filter is provided at the demodulator output to filter the undesired 2xif product. this balanced data slicer has a speed advantage over a conventional adaptive data slicer where a large capacitor is used to provide dc reference for bit deci- sion. since the balanced data slicer does not have to charge a large capacitor, the RF2905 exhibits a very fast response time. for best operation of the on-chip data slicer, fm deviation needs to exceed the carrier frequency error anticipated between the receiver and transmitter with margin. the data slicer itself is a transconductance amp and the data out pin is capable of driving rail to rail out- put only into a very high impedance and small capaci- tance. the amount of capacitance will determine the bandwidth of the data out. at a 3pf load, the band- width is in excess of 500khz. the rail to rail output of the data slicer is also limited by the frequency deviation and bandwidth of the if filters. with the 180khz band- width filters on the eval boards, the rail to rail output is limited to less than 140khz. choosing the right if bandwidth and deviation vs. data rate (mod index) is important in evaluating the applicability of the RF2905 for a given data rate. while this type of data slicer is best for wideband devi- ation, it can also work for narrowband if care is taken to minimize frequency differences. by loading down the data out pin, the output will be limited to a small data signal on a dc carrier. with this signal, an external data slicer can be used to achieve higher data rates or improve performance in narrow deviations. alterna- tively, an afc loop can be added to correct for fre- quency errors with a few external components. for fm or fsk modulation, an internal varactor is used to directly modulate the vco with the baseband data. the primary consideration when directly modulating the vco is the data rate verses pll loop bandwidth. the pll will track out the modulation to the extent of its loop bandwidth which distorts the modulating data. therefore, the lower frequency components of the modulating data should be 5 to 10 times the loop band- width to minimize the distortion. the lower frequency components are generated by long strings of 1?s or 0?s in the data stream. by limiting the number of consecu- tive, same bits, the lower frequency component can be set. in addition, the data stream should be balanced to minimize distortion. using a coding pattern such as manchester is highly recommended to optimize system performance. the pll loop bandwidth is important in several other system parameters. for example, switching from trans- mit to receive requires the vco to retune to another frequency. the switching speed is proportional to the loop bandwidth, the higher the loop bandwidth, the
11-62 RF2905 rev b11 010516 11 transceivers faster the switching times. phase noise of the vco is another factor. phase noise outside of the loop band- width is due to the noise of the vco itself rather than the crystal reference. a design trade-off must be made here in selecting a pll loop bandwidth with acceptable phase noise and switching characteristics and minimal distortion of the modulation data. am/ask systems the transmitter of the RF2905 has an output power level adjustment (lvl adj) that can be used to provide approximately 18db of power control for amplitude modulation. the rssi output of the receiver section can be used to recover the modulation. the rssi out- put is from a current source and needs to have a resis- tor to convert to a voltage. a 51k ? resistive load will produce an rssi voltage of 0.7v to 2.5v, typically. a parallel capacitor is suggested to limit the bandwidth and filter noise. for ask applications, the 18db range of the lvl adj does not produce enough voltage swing in the rssi for reliable communication. the on- off keying (ook) is suggested to provide reliable com- munications. to achieve this, both the lvl adj and tx enabl need to be controlled together (please note that lvl adj cannot be left high when tx enabl is low). this will provide a on/off ratio of >50db. one unfortunate consequence of modulating this way is vco pulling by the power amp. this results in a spuri- ous output outside the desired transmit band as the pll momentarily loses lock and reacquires. this can be avoided by pulse shaping the tx data to slow the change in the vco load to a pace that the pll can track with its given loop bandwidth. the loop bandwidth can also be increased to allow it to track faster changes due to load pulling. for the ask/ook receiver demodulator, an external data slicer is required. the rssi output is used to pro- vide both the filtered data and a very low pass filtered (relative to the data rate) dc reference to a data slicer. because the very low pass filter has a slow time con- stant, a longer preamble may be required to allow for thedcreferencetogettoastablestate.here,asin the case of the fsk transmitter, the data pattern also affects the dc reference and the reliability of the received data. again, a coding scheme such as manchester such should be used to improve data integrity. application and layout considerations boththerxinandtxouthaveadcbiasonthem. therefore, dc blocking caps are required. if the rf fil- ter has dc blocking characteristics like a ceramic dielectric filter, then only 1 dc blocking capacitor would be needed to separate the dc of rx in and tx out. these are rf signals and care should be taken to route these signals keeping them physically short. because of the 50 ? /high impedance nature of these two signals, they may be connected together into a sig- nal 50 ? device such as a filter. an external lna or pa can be used, if desired, but an external rx/tx switch may be required. the vco is a very sensitive block in this system. rf signals feeding back into the vco either radiated or coupledbytracesmaycausetheplltobecome unlocked. the trace(s) for the anode of the tuning var- actor should also be kept short. the layout of the reso- nators and varactor are very important. the capacitor and varactor should be closest to the RF2905 pins and the trace length should be as short as possible. the inductors can be placed further away and any trace inductance can be compensated by reducing the value of the inductors. printed inductors may also be used with careful design. for best results, the physical layout should be as symmetrical as possible. figure 1 is a recommended layout pattern for the vco components. when using loop bandwidths lower than the 5khz shown on the eval board, better filtering of the vcc at the resonators (and lower vcc noise as well) will help reduce phase noise of the vco. a series resistor of 100 ? to 200 ? and a 1 f or larger capacitor can be used. for the interface between the lna/mixer, the coupling capacitor should be as close to the RF2905 pins as possible with the bias inductor being further away. once again, the value of the inductor can be changed to compensate to trace inductance. the output imped- ance of the lna is in the order of several k ? which makesmatchingto50 ? very hard. if image filtering is desired, a high impedance filter is recommended. figure 1. recommended vco layout 33 32 31 30 29 28 vcc gnd gnd loop voltage not to scale representative of size
11-63 RF2905 rev b11 010516 11 transceivers the quad tank of the discriminator can be implemented with ceramic discriminators available from a couple of sources. this design works well for wideband applica- tions and where the temperature range is limited. the temperature coefficient of a ceramic discriminator can be in the order of +/- 50ppm per degree c. an auto- matic frequency control loop can be implemented using the dc level of the fm out for feedback to an external varactor on the reference crystal. an alterna- tive to the ceramic discriminator is a lc tank. figure 2 shows a schematic implementation of a lc tank. thedemodinpinhasadcbiasonitandmustbe dc blocked. this can be done either at the pin or at the ground side of the lc tank (this must also be done if a parallel resistor is used with a ceramic discriminator). the decision whether to used a lc or a ceramic dis- criminator should be based upon the frequency devia- tion in the system, discriminator q needed, and frequency and temperature tolerances. tuning of the lc tank is required to overcome the component toler- ances in the tank. predicting and minimizing pll lock time the RF2905 implements a conventional pll on chip, with a vco followed by a prescaler dividing the output frequency down to be compared with a signal from the reference oscillator. the output of the phase discrimi- nator is a sequence of pulse width modulated current pulses in the required direction to steer the vco?s con- trol voltage to maintain phase lock, with a loop filter integrating the current pulses. the lock time of this pll is a combination of the loop transient response time and the slew rate set by the phase discriminator output current combined with the magnitude of the loop filter capacitance. a good approximation for total lock time of the rf29.5 is: lock time=d/fc+35000*c*dv where d is a factor to account for the loop damping. for loops with low phase margin (30 to 40), use d=2 whereas for loops with better phase margin (50 to 60), use d=1. fc is the loop cut frequency. c is the sum of all shunt capacitors in the loop filter. dv is the required step voltage change to produce the desired frequency change during the transient. to lock faster, we need to minimize c. 1. to this end, use the divide by 128 rather than the 64, and a correspondingly lower frequency refer- ence crystal to achieve the desired output fre- quency. 2. design the loop filter for the minimum phase margin possible without causing loop instability problems; this allows c to be kept at a minimum. 3. design the loop filter for the highest loop cut fre- quency possible without distorting low frequency modulation components; this also allows c to be kept at a minimum. crystal selection several issues arise in the selection of the crystals. timing specifications such as start-up and switching are related to the crystal specifications, as well as external circuitry. the tolerance of the crystals are also an issue in optimum radio performance. in general, tighter tolerance crystals lead to better performance and are more critical to higher data rates. frequency offsets between the tx crystal, rx crystal and discrim- inator generate duty cycle variations in the receive demodulator. the crystals used on the RF2905 evaluation boards are specified as a parallel resonant, 30pf crystal with a maximum esr of 80 ? . the initial tolerance is + 20ppm and temperature stability is + 30 ppm for -10c to 70c. the transistor oscillator will work with a variety of different crystals and the final crystal specifications should be evaluated for each application. faster start-up or switching times are achievable by specifying crystals with low motion inductance and low motional resistance. additionally, the feedback caps of the oscillator can be changed to increase the voltage on the crystal. generally, crystals in the leaded hc-49u packages will provide better start-up times than the smaller surface-mount types used on the eval- uation board. 4-22 pf r opt. c16 10 nf c177pf 3.3 h 39 pf 28 27 figure 2. lc type discriminator circuit
11-64 RF2905 rev b11 010516 11 transceivers pin out 1 2 3 4 5 6 7 8 9 10 11 12 36 35 34 33 32 31 30 29 28 27 26 25 rx enabl tx enabl tx out gnd2 rx in gnd1 lna out gnd3 mix in gnd5 mix out+ mix out- mod ctrl div ctrl mod in gnd4 vcc2 resntr- resntr+ vcc6 if2 out demod in data out fm out 48 45 46 47 if1 in+ if1 in- if1 bp+ if1 bp- if1 out if2 in gnd6 vref if if2 bp+ if2 bp- mute rssi pll enabl lvl adj vcc3 prescl out vcc1 lock det vref p loop flt osc b1 osc e osc b2 osc sel 44 43 42 41 40 39 38 37 13 16 15 14 17 18 19 20 21 22 23 24
11-65 RF2905 rev b11 010516 11 transceivers application schematic 915mhz 17 18 26 12 11 9 linear rssi 24 7 5 gain control 47 3 31 30 34 prescaler 128/129 or 64/65 phase detector & charge pump 41 40 39 38 35 36 lock detector 42 43 ref select 37 14 13 data out rssi div ctrl mod ctrl osc sel 23 mute 21 20 22 16 15 lvl adj lock det+ 45 prescl out 28 27 25 fm out d1 4.7 nh 4.7 nh v cc 2.7 k ? 3.3 nf 47 nf filter 22 pf 10 nh 10 pf v cc 8.2 h 22 pf v cc filter filter fm disc. 51 k ? 10 pf tx data 3.9 k ? 5pf 22 pf 10 nf 100 pf 100 pf 10 nf 10 nf 10 nf 10 nf 10 nf 10 nf 5pf 100 pf 100 pf 100 pf 0.1 uf 10 ? 11 pf 10 ? 10 nf 10 ? 10 nf d1 : smv1233-011 22 pf 29 10 ? v cc 10 nf 2 1 48 pll enabl rx enabl tx enabl 22 pf v cc 10 nf 32 pll loop bandwidth ~5 khz 10 ? 46 4.7 uf 22 pf v cc 10 nf 10 ? 44 10 nf 22 pf
11-66 RF2905 rev b11 010516 11 transceivers application schematic 868mhz 17 18 26 12 11 9 linear rssi 24 7 5 gain control 47 3 31 30 34 prescaler 128/129 or 64/65 phase detector & charge pump 41 40 39 38 35 36 lock detector 42 43 ref select 37 14 13 data out rssi div ctrl mod ctrl osc sel 23 mute 21 20 22 16 15 lvl adj lock det+ 45 prescl out 28 27 25 fm out d1 6.8 nh 6.8 nh v cc 2.7 k ? 3.3 nf 47 nf filter 22 pf 10 nh 10 pf v cc 8.2 uh 22 pf v cc filter filter fm disc. 51 k ? 10 pf tx data 3.9 k ? 3pf 22 pf 10 nf 100 pf 100 pf 10 nf 10 nf 10 nf 10 nf 10 nf 10 nf 5pf 100 pf 100 pf 100 pf 0.1 uf 10 ? 11 pf 10 ? 10 nf 10 ? 10 nf d1 : smv1233-011 22 pf 29 10 ? v cc 10 nf 2 1 48 pll enabl rx enabl tx enabl 22 pf v cc 10 nf 32 pll loop bandwidth ~5 khz 10 ? 46 4.7 uf 22 pf v cc 10 nf 10 ? 44 10 nf 22 pf
11-67 RF2905 rev b11 010516 11 transceivers application schematic 433mhz 17 18 26 12 11 9 linear rssi 24 7 5 gain control 47 3 31 30 34 prescaler 128/129 or 64/65 phase detector & charge pump 41 40 39 38 35 36 lock detector 42 43 ref select 37 14 13 data out rssi div ctrl mod ctrl osc sel 23 mute 21 20 22 16 15 lvl adj lock det+ 45 prescl out 28 27 25 fm out d1 27 nh 27 nh v cc 2.7 k ? 3.3 nf 47 nf filter 22 pf 47 nh 33 pf v cc 8.2 uh 22 pf v cc filter filter fm disc. 51 k ? 10 pf tx data 3.9 k ? 3pf 22 pf 10 nf 100 pf 100 pf 10 nf 10 nf 10 nf 10 nf 10 nf 10 nf 5pf 100 pf 100 pf 100 pf 0.1 uf 10 ? 11 pf 10 ? 10 nf 10 ? 10 nf d1 : smv1233-011 22 pf 29 10 ? v cc 10 nf 2 1 48 pll enabl rx enabl tx enabl 22 pf v cc 10 nf 32 pll loop bandwidth ~5 khz 10 ? 46 4.7 uf 22 pf v cc 10 nf 10 ? 44 10 nf 22 pf
11-68 RF2905 rev b11 010516 11 transceivers evaluation board schematic (download bill of materials from www.rfmd.com.) 1 2 3 4 5 6 7 8 9 10 11 12 36 35 34 33 32 31 30 29 28 27 26 25 48 45 46 47 44 43 42 41 40 39 38 37 13 16 15 14 17 18 19 20 21 22 23 24 vcc mod ctrl p3-1 p3-3 p3 gnd 1 2 3 pll enabl tx enabl p1-1 p1-3 p1 gnd 1 2 3 osc sel gnd p4-2 p4-3 p4 rx enabl 1 2 3 4 5 p4-4 p4-5 div ctrl mute n/c lvl adj p2-1 p2-3 p2 gnd 1 2 3 lock det p5-1 p5 gnd 1 2 c4 22 pf l1* c5* l2 8.2 uh c7 22 pf c8 10 pf c6 10 nf r1 10 ? c3 10 nf f1 sfecv10.7 m s3s-a-tc bw=180khz c10 10 nf c11 10 nf c9 10 nf f2 sfecv10.7 m s3s-a-tc bw=180khz c13 10 nf c14 10 nf c12 10 nf mute r5 51 k ? c15 1nf j3 r22 n/c slicer in j4 fm out j5 dataout c1610nf c174pf r13 1.5 k ? cdf107b-a0.001 disc r8 0 ? c21 22 pf r7 10 ? d1 l4* l5* c18* r6 10 ? c22 10 nf c20 10 nf c19 22 pf x1* x2* osc sel mod ctrl div ctrl j6 mod in r17 3.9 k ? c26 3.3 nf c27 47nf c1 100 pf c2 100 pf l7* l6* c36* c39* c35* j1 rf rx enabl tx enabl pll enabl lvl adj c31 22 pf c30 10 nf r12 10 ? c34 4.7 f c32 10 nf c33 22 pf r15 0 ? r14 0 ? l3 2.2 h c37 120 pf j2 mixout c38 0.1 f r23 0 ? q1 2n3904 r16 tbd r10 50 k ? r21 50 k ? 1 3 4 5 2 c28 10 nf c40 33 nf r11 1m ? c29 1nf r18 tbd lock det test only not populated u3 lmc7211 slicer in circuit not populated. optional lock detector or ook data slicer smv1233-011 linear rssi gain control prescaler 128/129 or 64/65 phase detector & charge pump lock detector ref select c24 100pf vcc vcc vcc r3 10 ? r4 8.2 k ? vcc r9* l (433mhz) m (868mhz) h (915mhz) board 8 4 4 c35 (pf) 22 8.2 8.2 l6 (nh) 22 jumper jumper l7 (nh) 3 5 5 c18 (pf) 8 n/c n/c c39 (pf) 47 10 10 l1 (nh) 35 10 10 c5 (pf) 27 4.7 4.7 l4,l5(nh) 2.4 2.7 2.7 r9 (k ? ) 6.78 13.577344 7.15909 x1 (mhz) 6.612 13.410156 7.07549 x2 (mhz) 2905400-, 401-, 402- c41 3-10 pf c42 3-10 pf c25 100 pf c23 100 pf
11-69 RF2905 rev b11 010516 11 transceivers evaluation board layout board size 3.05? x 3.05? board thickness 0.031?, board material fr-4, multi-layer (same board layout is used for the -l, -m, and -h versions.)
11-70 RF2905 rev b11 010516 11 transceivers
11-71 RF2905 rev b11 010516 11 transceivers
11-72 RF2905 rev b11 010516 11 transceivers 0 1.0 1.0 -1.0 10.0 1 0 . 0 - 1 0 . 0 5.0 5 . 0 - 5 . 0 2.0 2 . 0 - 2 . 0 3.0 3 . 0 - 3 . 0 4.0 4 . 0 - 4 . 0 0.2 0 . 2 - 0 . 2 0.4 0 . 4 - 0 . 4 0.6 0 . 6 - 0 . 6 0.8 0 . 8 - 0 . 8 lna s11 swp max 1.2ghz swp min 0.3ghz rxofftxoff rxontxoff 0.3ghz 0.3ghz 0 1.0 1.0 -1.0 10.0 1 0 . 0 - 1 0 . 0 5.0 5 . 0 - 5 . 0 2.0 2 . 0 - 2 . 0 3.0 3 . 0 - 3 . 0 4.0 4 . 0 - 4 . 0 0.2 0 . 2 - 0 . 2 0.4 0 . 4 - 0 . 4 0.6 0 . 6 - 0 . 6 0.8 0 . 8 - 0 . 8 rf out s22 swp max 1.2ghz swp min 0.3ghz txonrxoff 0.3ghz
11-73 RF2905 rev b11 010516 11 transceivers rssi freq. = 915 mhz, vcc = 3.6v, rload = 51 k ? ? ? ? 0.0 0.5 1.0 1.5 2.0 2.5 -120.0 -100.0 -80.0 -60.0 -40.0 received power (dbm) rssi output (volts) modulation deviation freq. = 915 mhz, vcc = 2.7 v, lvl adj = 2.7 v 0.0 100.0 200.0 300.0 400.0 500.0 600.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 mod in (volts) deviation from carrier (khz) modulation deviation freq. = 915 mhz, vcc = 3.3 v, lvl adj = 3.3 v 0.0 100.0 200.0 300.0 400.0 500.0 600.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 mod in (volts) deviation from carrier (khz) modulation deviation freq. = 915 mhz, vcc = 5.0 v, lvl adj = 5.0 v 0.0 200.0 400.0 600.0 800.0 1000.0 1200.0 0.0 1.0 2.0 3.0 4.0 5.0 6.0 mod in (volts) deviation from carrier (khz)
11-74 RF2905 rev b11 010516 11 transceivers tx power output and i cc versus level adjust at 433 mhz, 3.6 v vcc -15.0 -10.0 -5.0 0.0 5.0 10.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 lvl adj (v) rf p o (dbm) 5.0 10.0 15.0 20.0 25.0 30.0 i cc (ma) p out (db) icc (ma) tx power output and i cc versus level adjust at 868 mhz, 3.6 v vcc -15.0 -10.0 -5.0 0.0 5.0 10.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 lvl adj (v) rf p o (dbm) 5.0 10.0 15.0 20.0 25.0 30.0 i cc (ma) p out (db) icc (ma) tx power output and i cc versus level adjust at 905 mhz, 3.6 v vcc -15.0 -10.0 -5.0 0.0 5.0 10.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 lvl adj (v) rf p o (dbm) 5.0 10.0 15.0 20.0 25.0 30.0 i cc (ma) pout(db) icc (ma) rx mode current versus vcc freq = 905 mhz 6.00 7.00 8.00 9.00 10.00 11.00 12.00 2.50 2.75 3.00 3.25 3.50 3.75 4.00 4.25 4.50 4.75 5.00 vcc (v) i cc (ma) icc (ma) tx power output and i cc versus vcc at 905 mhz, lvl adj = vcc 0.00 1.00 2.00 3.00 4.00 5.00 6.00 7.00 8.00 9.00 10.00 2.50 2.75 3.00 3.25 3.50 3.75 4.00 4.25 4.50 4.75 5.00 vcc, lvl adj (v) rf p o (dbm) 10.00 15.00 20.00 25.00 30.00 35.00 40.00 i cc (ma) power(dbm) icc(ma)

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